1. Field of the Invention
The present invention relates in general to a method and apparatus for analyzing the timing and logical relationships among digital waveforms. More particularly, the present invention relates to an apparatus and method for analyzing the relationships between binary waveform inputs and outputs of two digital devices to generate the logic implementation for the design of an interface circuit between the two or more digital devices so that the interface circuit permits logic and timing compatibility between the devices.
2. Background Discussion
A problem in the design of digital systems is the incompatibility of the various components from different manufacturers. For example, the manufacturer of a computer will specify the various input and output binary signals necessary to communicate with its computer. Likewise, the manufacturers of the peripheral devices that interconnect with the computer also provide detailed signal specifications for interconnecting the inputs and the outputs of the devices. While some manufacturers of peripheral devices specifically manufacture the device to communicate with a given processor, it is more common to design an interface circuit that allows a peripheral device to communicate with a computer or another interface device. These interface devices provide the necessary logic and timing compatibility. Some peripheral devices have several interface circuits for each different function they perform.
It is difficult to design interface circuits since the engineer must manually determine the necessary Boolean logic equations in the design of the interface circuit so that a peripheral device or system is fully compatible with the computer.
The problem of compatibility is not limited to processors and digital devices but is a common problem between any digital device that must communicate with another digital device.